Chip bonding is costly. The two largest components of the cost of RFID tags today are the integrated circuit and the attachment of that circuit to an antenna structure. Moore's law and increasing volume are helping to drive the IC cost down, but bonding is a mechanical process and does not benefit from the same technology advances or economies of scale.
Current methods of chip bonding do not adequately address cost. A two-step approach of an intermediary “strap” achieves incremental cost improvement by relocating the costs. However, straps do not address the problem directly, as bonding is still required, but to a smaller tag. Moreover, straps add another step to bond the strap to the big tag.
Current manufacturers using standard bonding technology with straps, want straps to be like traditional bonding surfaces, that is, hard and inflexible. But such straps do not lend themselves to easy integration into squishy flexible tags. The known standard bonding processes are all strap-based solutions, and therefore less than ideal.
One related art bonding method, called fluid self-assembly, provides insufficiently robust bonds. Because the chips find their own way into bonding sockets, the chips cannot use any adhesives or flux, since anything sticky prevents free motion of the chip into the sockets. Then the bond is made at a tangent between the chip bonding pad and the side of the bonding cavity. This flat-to-edge bond is different than and less reliable than traditional bonds, which are made flat-to-flat. As an analogous example illustrating problems inherent to flat-to-edge bonds, consider trying to stand a playing card on edge, rather than laying it flat on a table. Fluid self-assembly also places restrictions on the type of substrate that can be used. This may not be a problem for just making straps; but it is certainly a problem for foregoing the strap and putting the chip right on the tag.
A known bonding process is a gallant brute force attempt to make standard bonding faster. Instead of having one vacuum head pick up one chip and place it on one strap, a plurality of heads (e.g., 60) in lock step picks up that number (e.g., 60) of chips and puts them on that number (e.g., 60) of straps. This process suffers from the problem of keeping all of the number (e.g., 60) of chips aligned correctly at the same time.
Bonding RFID chips is more like processing diodes and resistors than processing other kinds of chips. One new RFID strap line uses a traditional tape automated bonding process, with a sprocket-fed 35 mm tape of hard straps inching its way through a traditional flip-chip placement and bonding head. At 4.75 mm pitch, four lanes wide, and 10,000 chip bonds per hour, their tape advances through the bonding procedure at about 0.65 feet per minute. It would be beneficial if a chip bonding process could produce more bonded chips in less time.
In order to consider why the art has not bonded chips as exemplified by the preferred embodiments of the invention discussed below, it may help to compare standard electronic chip components to RFID tags. Standard electronic chip components are known and generally found on printed circuit boards. A bare IC is bonded to a carrier by wire bonding or flip chip. Then a package is molded around the carrier and chip. The package is then put onto a printed circuit board via thru-hole or surface mount assembly. In summary, typical standard chip components: need to be compatible with multiple PCB assembly technologies, including solder baths, solder waves, IR reflow, and a variety of cleaning and baking steps; want more and more computational power put in single chip assemblies; and are made to last. In contradistinction, RFID tags: are never soldered or baked or cleaned; are complete unto themselves and do not have to be integrated into any other system; want the bare minimum computational power to minimize cost and energy consumption (which translates into read distance); and do not face the same power dissipation or environmental requirements as standard chips.
To meet their design requirements, standard chip assemblies usually start with relatively stiff and heavy substrates, at least compared to RFID tags. Ceramics and fiberglass are common. These are meant to be tough and resistant to thermal influences. Usually the standard chip substrates are etched. Laser cutting is expensive because the standard chip substrates are thick and have high thermal masses.
RFID tags are substantially different. The metal layer is thin and flexible (or non-rigid) by comparison. The back or substrate of each tag is soft polypropylene or paper. The substrates are easily to punch, cut, dimple, and weld. The preferred embodiments of the invention reinvent bonding taking advantage of these different properties.
A known wire bonding process is disclosed in U.S. Pat. No. 5,708,419 to Isaacson, et al., the contents of which are incorporated by reference herein in its entirety. Isaacson discusses the bonding of an IC to a flexible or non-rigid substrate which generally can not be subjected to high temperatures, such as the temperature required for performing soldering processes. In this wire bonding process, a chip or die is attached to a substrate or carrier with conductive wires. The chip is attached to the substrate with the chip front-side face up. Conductive wires are bonded first to the chip, then looped and bound to the substrate. The steps of a typical wire bonding process include:                1. advancing web to the next bond site        2. stopping        3. taking a digital photograph of the bond site        4. computing bond location        5. picking up a chip        6. moving the chip to the bond site        7. using photo feedback to adjust placement to the actual site location        8. placing or depositing chip        9. photographing the chip to locate the bond pads        10. moving the head to the chip bond pad        11. pressing down, vibrating and welding conductive wire to the bond pad        12. pulling up and moving the chip to the substrate bond pad, trailing wire back to the chip bond        13. pressing down and welding that bond        14. pulling up and cutting off the wire; and        15. repeating steps 10-14 for each connection        
In contrast, the interconnection between the chip and substrate in flip-chip packaging is made through conductive bumps of solder that are placed directly on the chip surface. The bumped chip is then flipped over and placed face down, with the bumps electrically connecting to the substrate.
Flip chip bonding, a current state of the art process, is expensive because of the need to match each chip to a tiny, precision-cut bonding site. As chips get smaller, it becomes even harder to precisely cut the bonding site. However, the flip-chip bonding process is a considerable advancement over wire bonding. The steps of a typical flip-chip bonding process include:                1. advancing web to the next bond site        2. stopping        3. photographing the bond site        4. computing the bond location        5. picking up the chip        6. moving the chip to the bond site        7. using photo feedback to adjust placement at the actual site location        8. placing the chip        9. ultrasonically vibrating the placement head to weld chip in place; and        10. retracting the placement head        
Steps 1 through 8 of each of the above bonding processes are substantially the same. The web must stop to locate the conductive gap in the substrate and precisely place the IC. The related art processes require that the web is stopped and measured (e.g., photographing the bond site, containing the bond location, using photo feedback to adjust placement at the actual site location) so that the chip can be accurately placed as desired adjacent the gap and bonded.
In designing an efficient chip placement process that can be integrated into RFID tags, the inventors discovered that it is beneficial to avoid anything that is not consistent with a continuous rolling printing press. Stopping and starting the line always slows things down. It would be beneficial to adjust tooling to operate on a chip that is continuously advancing down the line at a known rate of travel.
Retracing a path during the bonding process takes time, causes vibration, and wears mechanical linkages. These linkages also create uncertainty in absolute position. Rotating or continuous devices are thus preferred over reciprocating devices.
The greater the number of mechanical connections in a bonding process, the less certainty there is in precise position. Every jointed or flexible linkage introduces a certain amount of randomness as the web and chips wiggle around. IC dimensions are tiny. It does not take a lot of mechanical links to move chip placement out of critical alignment.
With security tags, you cannot rely on any precise dimension set previously. The relative position of things varies across the web, from one end of the roll to another, from place to place, and from time to time. That is simply the reality of working with inexpensive materials. For IC bonding processes, the manufacturer must constantly adapt to how the material is really behaving, rather than counting on it to behave as intended.